MOS Models

The cost and complexity of the devices used in a modern submicron CMOS technology are mind-boggling. The cost and complexity of developing these technologies is also staggering. These pressures have led to a great investment in effort to produce high quality device models for yield reasons.

The pressure has also led to a nearly complete movement towards keeping device models proprietary, greatly limiting the availability for smaller commercial entities and academic institutions. It also limits the ability of a company to do exploratory analysis without a huge upfront cost.

The Open Source Chips Initiative sponsored by Google is an outstanding effort to improve this situation. Please see our resources page for the GF180MCU process.

Links

The link below shows some 45nm CMOS models:

https://analogicdesign.com/students/netlists-models/model-files

The file p045.zip has both NMOS and PMOS model files.

MOS Model Table Look-UP

Click the link below to use the MOS Table Lookup plotting tool.

https://subckt.org/mosPlot.html

The lookup tables are generated with SPICE and accessed on the remote server using Octave (Matlab clone)